The company develops proprietary AI accelerators at the intersection of semiconductor technologies, optics, and AI. The goal is to ensure deterministic, low-latency execution and reliable control of the device in both laboratory environments and future product-grade configurations.

The project involves the development and evolution of real-time system software that controls the accelerator and organizes interaction between the host system and proprietary hardware. The scope includes designing and maintaining a custom on-board OS / RTOS-like stack (scheduler, memory management, interrupts, synchronization), as well as building tooling for debugging and tracing code running on the device.

The key objective is to guarantee predictable response times and minimal jitter at the hardware <--> software boundary. This requires implementing deterministic execution paths, measuring and optimizing latency and jitter, analyzing complex timing scenarios, and debugging hardware–software interaction during early stages (chip bring-up, early silicon validation).

The project requires deep expertise in OS internals, memory safety, and concurrency (including memory ordering), as well as strong low-level debugging skills (GDB on live systems, core dumps, remote targets) and the ability to write high-performance C/C++ code for both host-side control and device-side execution.

Technical stack:

• Linux Kernel, KVM, QEMU.
• C, C++, Python.
• PCIe, DMA, MMIO, Interrupts, IOMMU.
• Bare-metal and virtualized cloud deployments.